1. Field of the Invention
The invention relates to a control technique, and more particularly to an input/output (I/O) control apparatus and a control method thereof.
2. Description of Related Art
Currently, super I/O chips are usually fixed components located on motherboards. The control circuits for middle-speed or low-speed interfaces are integrated in super I/O chip. As so defined, at least 2S, 1P, 1G and 1FD are integrated, which at least means two serial ports (COM1 and COM2), a parallel port, a game/joystick I/O and a set of floppy drive controllers (FDCs) are integrated. Sometimes, the super I/O chip requires a serial peripheral interface flash memory (SPI Flash) for providing instruction codes so that processors (e.g. 8051 micro-processor) in the super I/O chip can normally operate some tasks, such as processes of computer booting up or shutting down, hardware temperature monitoring and fan monitoring.
However, when a chip layout vender announces new requirements during designing, they plan to allow other chip-set to share storage spaces in the SPI Flash. Thus, they allow access byway of sharing a common SPI Bus with the super I/O chip. Since the chip-set has a higher usage privilege, the chip-set has to take the usage privilege upon the SPI Bus quickly. When the chip-set obtains the usage privilege and keeps occupying the SPI Bus, the processor in the super I/O chip can not obtain the instruction codes for operation from the SPI Flash for a long time, and thereby, a malfunction of computer hardware monitoring system occurs. Hence, how to avoid the chip-set from taking the usage privilege of the SPI Bus for a long time, and how the super I/O chip can effectively monitor the computer hardware monitoring system at the same time have become important topics.